Date: July 29, 2021
Time: 3:30-4:30pm ET
Abstract
Achieving zero-copy I/O has long been an important goal in the networking community. However, data serialization obviates the benefits of zero-copy I/O, because it requires the CPU to read, transform, and write message data, resulting in additional memory copies between the real object instances and the contiguous socket buffer. Therefore, we argue for off loading serialization logic to the DMA path via specialized hardware. We propose an initial hardware design for such an accelerator, and give preliminary evidence of its feasibility and expected benefits.
Bio
Adam Wolnikowski graduated from Yale in 2021 with a Bachelor’s in Electrical Engineering and Computer Science, and is now an embedded systems engineer at Humatics, a robotics startup in the Boston area. While at Yale, he researched both data center networking with Robert Soulé and attacks on machine learning accelerators with Jakub Szefer, and was awarded the Yale Computer Science Department prize for undergraduate research.